1. Field of the Invention
The present invention relates to a delta-sigma modulator, and more particularly to a 1-bit output type delta-sigma modulator for converting an input signal to a 1-bit PDM (Pulse Density Modulation) signal in proportion to the signal level and for outputting it.
2. Description of Related Art
At first, in contrast to delta modulation in a voice communication field, which was unable to handle a DC component, delta-sigma modulation was proposed as an efficient modulation technique capable of handling a DC component, that is, as a technique capable of converting an analog signal to a 1-bit PDM signal during the 1960s. However, it had not yet spread from a point of view of a signal bandwidth and an S/N ratio of the LSI technique at that time (see Non-Patent Document 1, for example).
[Non-Patent Document 1] H. Inose, Y. Yasuda and J. Murakami, “A telemetering system by code modulation—Δ-Σ modulation”, IRE Trans. Space Electron. Telemetry, vol. 8, pp. 204-209, September 1962.
Then, by the latter half of the 1980s, digital filters were able to be built into LSIs at practical cost because of miniaturization in LSI manufacturing processes, and had appeared as A/D conversion and D/A conversion techniques in voice communication or digital audio field. However, the common sense in academia and industry at that time considered that although telephone voice applications (4 kHz bandwidth, and S/N ratio=70 dB-80 dB) were possible, it was nearly impossible to implement A/D converters or D/A converters for hi-fi audio applications (22 kHz bandwidth, and S/N ratio=90-96 dB) at low cost. This is because it was difficult for the delta-sigma modulation technique to suppress the quantizing noise in a signal bandwidth to about −100 dB or less, because the delta-sigma modulation technique was the so-called oversampling noise shaping technique that carried out A/D conversion to a digital signal with a small number of bits at a sampling rate sufficiently higher than a target signal bandwidth (SBW: Signal BandWidth), and distributed the quantizing noise Qn, which was generated by the conversion to the small number of bits, outside the target bandwidth while repressing the distribution within the target signal bandwidth (SBW).
To achieve this, it is conceivable to take a step of increasing the oversampling ratio sufficiently, or of increasing the order of a loop filter for improving a noise shaping effect. However, as for a loop filter with third order or higher beyond second order, it was considered impossible to realize the delta-sigma modulation constituting a feedback system because of oscillation of the system. In addition, the LSI manufacturing technique at that time, in which a 3 μm gate length process enabling operation using a ±5 V power supply was the mainstream because analog applications required wide dynamic ranges, did not have sufficient speed, and although a 1 μm gate length process aiming at higher speed existed for digital applications, it was unable to provide sufficient analog accuracy because its withstand voltage was 5 V from a single power supply and the dynamic range was narrow. Accordingly, constructing a loop with a stable second order requires to increase the oversampling ratio extremely, which presents a problem of exceeding the limit of the LSI operating speed at that time. Against such problems, there were roughly three currents as the solutions in the latter half of the 1980s.
As a first current, there was a method that limited the order of the loop to a stable second order, and increased the oversampling ratio by a factor of 256, thereby improving the S/N ratio. A typical example thereof was implemented in D/A converters (see Non-Patent Document 2, for example).
[Non-Patent Document 2] P. J. A. Naus, et al. “A CMOS Stereo 16-bit D/A Converter for Digital Audio”, IEEE J. of Solid-State Circuits, Vol. SC-22, PP. 390-394, June 1987.
However, the method was for D/A conversion, and the delta-sigma modulator was to be realized by a digital circuit, which was unsuitable for A/D conversion considering the LSI manufacturing technique at that time. This is because in the A/D conversion, the delta-sigma modulator had to be implemented by an analog circuit such as a switched capacitor circuit, and it was difficult for the process at that time to achieve the 256 times oversampling operation while suppressing analog noise such as thermal noise and kT/C noise. Thus, it had declined as a lower oversampling ratio technique appeared which will be described later.
As a second current, there was the so-called MASH (Multi-Stage Noise Shaping) system that cascaded a plurality of first order delta-sigma modulators to implement higher-order delta-sigma modulation in a stable and equivalent manner, thereby reducing the oversampling ratio by a factor of 64 (see, Non-Patent Document 3, for example).
[Non-Patent Document 3] Y. Matsuya, et al. “A 16-bit Oversampling A-to-D Conversion Technology Using TripleIntegration Noise Shaping”, IEEE J. of Solid-State Circuits, Vol. SC-22, No. 6, pp. 921-929, December 1987.
However, it is necessary for the present system to logically combining a plurality of 1-bit delta-sigma modulation outputs. More specifically, it requires a correction operational circuit, the so-called noise cancel operational circuit, for obtaining desired noise shaping characteristics by combining individual outputs of the modulators which are produced as a result of the MASH modulation method carried out with an analog circuit. The noise cancel operational circuit makes its final output a PCM (Pulse Code Modulation) signal expressed by a plurality of bits. The PCM signal output from the noise cancel operational circuit is a signal with a high sampling rate used by the modulator such as 64-Fs signal in the case of 64-times oversampling. It is finally converted to a 16-bit PCM signal with 1 Fs=48 kHz with a digital decimation filter located downstream and is output.
Although the present system can maintain loop stability because it is a feedback system with first order, it has difficulty in achieving sufficient audio analog characteristics, and has been used only in the telephone voice band for a long time. This is because although the coefficients formed by the analog circuit are affected by manufacturing variation, the downstream noise cancel operational circuit performs digital operation that does not match the actual coefficients of the upstream analog circuit, which remains as a mismatch factor and deteriorates the linearity of the A/D conversion. Thus, it increases harmonic distortion or floor noise, and is insufficient for A/D conversion of high quality music signals.
A third current was a trial of achieving a higher S/N ratio with a lower oversampling ratio by solving higher-order instability in a higher-order single loop delta-sigma modulator with third order or higher (see Non-Patent Documents 4, 5 and 6, for example).
[Non-Patent Document 4] D. R. Welland, K. Hamashita, et al. “A Stereo 16-bit Delta-Sigma A/D Converter for Digital Audio”, J. Audio Eng. Soc., Vol. 37, No. 6, pp. 476-486, June 1989.
[Non-Patent Document 5] I. Fujimori, K. Hamashita, et al. “A Fifth-Order Delta-Sigma Modulator with 110 dB Audio-Band Dynamic Range” Audio Eng. Soc. 93rd Convention, 3415(L-1), October 1992.
[Non-Patent Document 6] K. Hamashita, E. J. Swanson “A Single-chip Stereo Audio CODEC” IEEE CICC'93, S28.4, May 1993.
The present system is one that obtains a stable solution by contriving a configuration of a higher-order loop filter in the so-called single loop type higher-order delta-sigma modulation system that outputs a 1-bit PDM signal. For example, Non-Patent Document 4 achieves fourth-order 1-bit 64-times oversampling, and performance of a 96-dB S/N ratio in an audio band. In addition, Non-Patent Document 5 achieves a 110-dB S/N ratio by using fifth order, and Non-Patent Document 6 discloses a CODEC including a fourth-order 1-bit D/A converter in the same manner as the fourth-order 1-bit A/D converter. The oversampling ratio is controlled at 64 times, and hence the LSI manufacturing technique at the time can realize sufficiently low cost, low power consumption A/D converters or D/A converters. Thus, they have been developed as mainstream techniques in various digital audio systems from professional equipment for studio recording to home audio equipment and portable recorder/players.
The present system has, as single loop characteristics, only one bit analog modulator output, and only a positive or negative reference potential as the feedback within the analog modulator. Accordingly, the 1-bit PDM signal expresses positive full scale or negative full scale subjected to 64-times oversampling, and a downstream 1/64 decimation digital filter converts the signal to an Fs=48 kHz, 16-bit PCM signal. The present system can obviate the need for a noise cancel operational circuit for carrying out inverse conversion of the coefficients of the analog section, which is required in the foregoing MASH system. Accordingly, it is immune to the manufacturing variation, thereby being able to offer substantially linear A/D conversion characteristics.
However, to operate the higher-order single loop delta-sigma modulators as a stable feedback loop, there are two important factors. The method is described in detail on page 2 of Non-Patent Document 5: a first factor is a selecting method of feedforward coefficients a1-a5 from the individual integrator outputs to the 1-bit quantizer in FIG. 2 of Non-Patent Document 5; and a second factor is a gain scaling method of carrying out the correction of the input gain with a downstream digital filter while setting an input signal range narrower than the full scale range of the delta-sigma modulator (see Patent Document 1).
[Patent Document 1] Navdeep Sooch, “Gain Scaling of Oversampled Analog to Digital Converters”, U.S. Pat. No. 4,851,841, filed October 1987.
The embodiments in Patent Document 1 are considered to be a stable system that does not oscillate conventionally because they include a second-order single loop configuration for a voice band. In practice, however, an overload phenomenon can occur in which the output of the integrator constituting the loop filter swings greatly at a time of an excessive input, thereby bringing about deterioration in the S/N ratio and large harmonic distortion and producing oscillate in some cases. More specifically, as disclosed in FIG. 2 of Patent Document 1, when assuming that the positive/negative full scale values, which employ as a reference the feedback value of the delta-sigma modulator, are ±1, a sufficient S/N ratio is obtained when the input range is within ±0.8. However, in the case of a large signal input of ±0.8 or more, the noise within the bandwidth increases and the S/N ratio deteriorates. Accordingly, to limit the input range within 80% of the full scale range of the delta-sigma modulator, the input gain is set at 0.8. This means that when considering contrariwise using the input full scale as the reference, the feedback value of the delta-sigma modulator, that is, the feedback gain=1/0.8=1.25. Thus, in FIG. 3 of Patent Document 1, an embodiment is described under the assumption that when the full scale of the analog input signal is ±3 V, the feedback value of the delta-sigma modulator is 1.25 times of that which is equal to ±3.75 V. Accordingly, as for the output from the 1-bit quantizer in the embodiment, the positive full scale value +1 and the negative full scale value −1 are expressed in 1-bit data, followed by assigning +1 to logic 1 and −1 to logic 0 to be output. Consequently, it is output as the so-called 1-bit PDM (pulse density modulation) signal in which when the input signal level increases toward the positive direction, the ratio of 1 increases, whereas when the input signal level increases toward the negative direction, the ratio of 0 increases. However, as a result of the gain scaling, the duty ratio of the output PDM signal does not become 0%-100%, but becomes 0.8 times, that is, 10%-90%. In other words, when the analog input is the positive full scale, the duty becomes 50%+0.8×50%=90%, whereas when the analog input is negative full scale, the duty becomes 50%−0.8×50%=10%.
Originally, an A/D converter is a device for converting an input analog signal within a predetermined ±full scale range to a digital signal while maintaining an accurate gain of 0 dB. Thus, to correct the 0.8-times input gain, the Patent Document 1 proposes a technique that multiplies, while eliminating high frequency noise from the 1-bit PDM signal through a downstream digital filter, the 16-bit PCM signal by a gain equal to the reciprocal of the input gain=1.25 when performing arithmetic processing on the 16-bit PCM signal, thereby maintaining the gain of the entire A/D converter including the digital filter to 0 dB. The technique is effective when it is expected that the final output of the A/D converter is a 16-bit PCM signal after the digital decimation filter.
On the other hand, the delta-sigma modulators shown in the Non-Patent Documents 4-6 are applied to digital music that demands higher performance than the telephone voice band. Thus, they aim at implementing higher-order delta-sigma modulations such as fourth-order or fifth-order modulations stably without bringing about an overload. Accordingly, they require gain scaling greater than the second-order delta-sigma of Patent Document 1. Although the reference materials do not mention any concrete numerical values, an appropriate value as the input gain is about 0.5 times, for example, which is smaller than 0.8 times of the second order. Since the correction of the input gain is carried out by the downstream digital filter, the 0 dB gain is exactly achieved as the entire A/D converter including the digital filter.
Incidentally, the input gain of 0.5 times can be easily realized using a switched capacitor circuit (SC circuit) shown in Non-Patent Documents 4-6. For example, when setting the full scale of the analog input signal at ±3 V, the input gain of 0.5 is feasible by setting the capacitor value Cf of the SC circuit for the full scale feedback at Cf=2Cs with respect to the capacitor value Cs of the SC circuit for sampling the input signal, and by setting the reference potential for the full scale feedback at ±3 V equal to the input full scale. Thus, the amount of charge transferred in both the SC circuits is Qs=±3 V·Cs for the input full scale and Qf=±3 V·Cf=±3 V·2Cs for the full scale feedback, thereby constituting a delta-sigma modulator with the input gain=0.5 times, which enables feedback of the amount of charge twice the input full scale.
In summary, the foregoing gain scaling methods maintain the loop stability of the delta-sigma modulators by multiplying the input signal by the input gain with a prescribed value less than 0 dB, and multiply the fixed filter gain, which is the reciprocal of the input gain, using the downstream digital filter. In addition, the D/A converters have the digital delta-sigma modulators set a fixed input gain, and have the downstream analog 1-bit D/A conversion or an analog post-filter multiply the correction gain needed. However, although such gain scaling can achieve a stable higher-order delta-sigma type ADC or DAC, it is a defect from the viewpoint of the analog performance versus power consumption. For example, in the ADC, the S/N ratio is greatly deteriorated not only by the quantizing noise, but by thermal noise caused by an operational amplifier or SC circuit. For example, the thermal noise due to the SC circuit can be calculated from the capacitance C of the capacitor using kT/C (where k is the Boltzmann constant and T is operating temperature), and to improve the S/N ratio by 3 dB, twice the capacitor value is necessary and the current for driving it becomes twice. Accordingly, implementing the input gain scaling of −0.5 times=−6 dB in the higher-order delta-sigma corresponds to the deterioration of S/N ratio of 6 dB in terms of the analog noise, and both the capacitor value and driving current must be increased four times to counteract the deterioration.
The greatest application of A/D converters to digital audio equipment is A/D conversion of a voice or music signal input from a microphone, and delivers to a digital medium. However, the output level of the microphone itself that converts air vibration from a sound source to an analog electric signal is very small, and the analog output signal level from the microphone is a few tens of millivolts at most even by using electrical amplifier. In contrast, the input full scale level of an A/D converter having a sufficient dynamic range with an S/N ratio of 90 dB is generally several volts, and an amplifier of about 10 dB-40 dB is necessary between the microphone and the A/D converter. In addition, since the distance between the microphone and sound source is not fixed in common, it is general to use for optimum recording a variable gain amplifier capable of varying the gain in accordance with conditions as the amplifier. The greatest problem here is disturbance noise placed into analog wiring from the microphone to the variable amplifier and A/D converter. Generally, the microphone is placed near a sound source such as a man or musical instruments, and the variable amplifier and A/D converter are placed within digital audio equipment such as a recorder, and the signal is transferred between them via the analog wiring. Accordingly, if the disturbance noise is put into the analog wiring, the downstream variable amplifier amplifies the disturbance noise as well and inputs to the A/D converter, thereby causing large sound quality deterioration. The foregoing configuration is referred to as the so-called analog microphone, and noise control measures of the analog signal line are important.
In contrast with the foregoing, the so-called digital microphone has been spread recently which includes the variable gain amplifier and A/D converter and transfers a digital signal to a device. In this case, the adverse effect of the disturbance noise can be greatly eliminated because of the digitized signal transfer. However, it becomes an expensive system owing to an increase of the number of signal lines because it transmits and receives data, a clock signal and a control signal as a digital interface. In addition, it is necessary to standardize an interface between various microphones and recording equipment, and thus there are many problems. One of the most effective example in this current is to employ the USB standard that has become common in the PC field. It is the so-called USB microphone that has an A/D converter and a USB interface function included on a microphone side, and is able to be connected to a PC or game equipment having a USB interface. However, since the USB interface has a large digital circuit scale and is still expensive, and has large power consumption, it is difficult to spread widely to general applications.
In the foregoing background, the so-called PDM microphone utilizing characteristics of a single loop delta-sigma modulator has been investigated as a new standardization movement. More specifically, it is a method that places components up to a delta-sigma modulator for converting the analog signal to a 1-bit PDM signal on the microphone side, and that transfers the 1-bit PDM signal output as it is to the recording equipment side via a digital signal line as a single digital signal. If it becomes possible, a system can be provided which has analog characteristics insensitive to disturbance noise to the digital signal line, has an interface consisting of a simple logic buffer, and is low cost and has low power consumption. As for the 1-bit PDM signal output from the PDM microphone, the apparatus side can convert it simply to a 1 Fs=48 kHz, 16-bit PCM signal with a conventional decimation digital filter.
However, what is necessary here is the standardization of an oversampling ratio. If the oversampling ratio varies from 64 to 256 times depending on various types of microphones, the operation of the decimation filter cannot be executed correctly. In addition, even if it employs the 1-bit transfer, to aim at a system configuration with power consumption as low as possible, a low transfer rate is preferable, and a lower oversampling ratio should be selected as far as possible. However, as is clear from the foregoing conventional technique, to enable the 1-bit PDM signal output with 64-times oversampling ratio in audio applications (SBW=22 kHz, and S/N=90 dB or more), a higher-order single loop delta-sigma modulator with a fourth-order or so is necessary. Accordingly, the gain scaling of about −6 dB is essential, and the output duty of the 1-bit PDM signal is limited to about 50%. This results in reduction in efficiency of the total system, that is, reduction in the efficiency in terms of a dynamic range, S/N ratio and power consumption. To circumvent the gain scaling, a second-order delta-sigma modulation is used. However, it has a high oversampling ratio of 256 times, and is inefficiency as well.
The present invention is implemented to solve the foregoing problems. It is therefore an object of the present invention to provide a stable delta-sigma modulator with good microlevel signal reproducibility capable of outputting a 1-bit PDM signal of a low oversampling ratio of about 64-times at a high duty ratio of 90% or more.